I am a postdoc researcher in computer science at Harvard University, working with Dr. David Brooks and Dr. Gu-Yeon Wei in the Harvard Architecture, Circuits, and Compilers Group. My research interests are broadly in the areas of computer architecture, machine learning, reliability, and approximate computing. My work focuses on addressing the role hardware errors play on an application’s error tolerance, by designed tools and techniques to help understand how hardware errors propagate and affect software.

I completed my PhD at UIUC under the guidance of Dr. Sarita Adve in the RSim Research Group. During my graduate studies, I was very fortunate to be the recipient of the Mavis Future Faculty Fellowship, to be invited to the 7th Heidelberg Laureate Forum, and to recieve multiple awards for teaching and mentoring undergraduate students. Prior to joining UIUC, I completed my BSE from Princeton University, where I was the recipient of the John Ogden Bigelow Jr. Prize in Electrical Engineering.

In addition to doing research, I also enjoy watching documentaries, playing soccer, and I am a contributing feature article writer at TechSpot.com.

If you are a student or researcher (or both!), please feel free to reach out to me by email!

Research Interests:

• Computer Architecture
• Reliability
• Software Testing
• Machine Learning
• Approximate Computing

News:

• New: Our tool, PyTorchFI, has surpassed 25,000 downloads and has been accepted into the PyTorch EcoSystem!
• New: Our paper titled “Optimizing Selective Protection for CNN Resilience” has been accepted for publication at ISSRE 2021!
• New: Serving on the ASPLOS 2022 ERC.
• New: Serving as an ASPLOS 2022 Social Co-Chair (w/ Elba Garza).
• New: Accepted to the 2nd Cultural Competence in Computing (3C) Fellows cohort (w/ Udit Gupta and Lillie Pentecost)!
• New: Serving on the MICRO 2021 Artifact Evaluation Committee.
• New: Invited to attend the Stanford Faculty Job Search Bootcamp 2021 and the New England Future Faculty Workshop 2021.
• New: Our paper titled “Mentoring Opportunities in Computer Architecture: Analyzing the Past to Develop the Future” is accepted to WCAE 2021, colocated with ISCA 2021! Paper, Workshop Video, Panel Discussion.
• Serving as an ASPLOS 2021 Social Co-Chair (w/ Elba Garza).
• Joined the Harvard Architecture, Circuits, and Compilers Group as a Postdoc Researcher!
• Deposited my PhD thesis! Title: Towards Scalable and Specialized Application Error Analysis.
• If you are a graduate or undergraduate student in computer architecture, checkout the Computer Architecture Student Association (CASA)! Founded by students, for students!
• Presented our work on HarDNN at SRC TECHCON 2020!
• Invited to attend the 2020 NextProf Nexus Workshop!
• Presented our paper titled, “PyTorchFI: A Runtime Perturbation Tool for DNNs” at DSN-DSML 2020!
• Our paper titled, “Inter-Kernel Reuse-Aware Thread Block Scheduling” is accepted for publication at TACO 2020!
• Awarded the CITL Certificate in Foundations of Teaching!
• Presented our paper titled, “Feature Map Vulnerability Evaluation in CNNs” at SARA 2020!
• Received the Certificate of Mentorship from the Graduate College at UIUC for mentoring two undergraduate students in research!
• “Approximate Checkers” is accepted at WAX 2019!
• Released PyTorchFI, a runtime error injection tool for PyTorch!
  Go ahead and pip install pytorchfi!
• Received the Lynn Conway Research Award for Best Technical Demonstration at ADA!
• Received the Mavis Future Faculty Fellowship Award for 2019-2020!
• Presented our paper titled, “Minotaur: Adapting Software Testing Techniques for Hardware Errors” at ASPLOS 2019!
• Invited to attend the 7th Heidelberg Laureate Forum, 1 of 200 young researchers invited worldwide!
• Presented our paper titled, “Optimizing Software-Directed Instruction Replication for GPU Error Detection” at SC 2018!